pub fn dma_copy_to_vram(
_dma: &mut GpuDma,
rect: VramRect,
words: &[u32],
) -> boolExpand description
Upload words to rect over block-mode DMA (channel 2) instead of
word-at-a-time FIFO writes, and wait for it. This mirrors PsyQ’s
LoadImage: BS = words-per-row, BA = rows.
words holds the pixels as little-endian 32-bit words, two 16-bit
halfwords each, row after row: (rect.w / 2) * rect.h words, and only
that many are sent. Returns false, leaving the GPU untouched, when the
transfer cannot be expressed this way: an odd or zero width, a zero
height, a row wider than the GPU’s 16-word FIFO, or a slice shorter than
the rectangle. Use upload_16bpp (the FIFO path) for those.
Opt-in: on real hardware the DMA controller can latch a channel
busy-forever (CL2 probe, 2026-07-31). The completion wait is bounded,
so a wedge costs a false and a partial upload rather than a hang.