Module cache 

Instruction-cache invalidation, done directly on the hardware.

The runtime does this itself rather than through the BIOS A(44h) FlushCache service, so its boot path makes no BIOS call.

The R3000A’s instruction cache is 4 KiB, direct mapped, 256 lines of 16 bytes. psx-spx (“Memory Control”, FFFE0130h, and the COP0 status register’s IsC bit 16) describes how software reaches its tags: with the cache control register in tag test mode and SR.IsC set, a word store to an address in 0x000..0x1000 writes the tag of the line that address maps to, instead of memory. Storing zero marks the line invalid.

The routine below:

• runs from the KSEG1 (uncached) alias of its own code, so no instruction is fetched through the cache while it changes;
• clears SR before touching the cache control register, so no interrupt can run while the scratchpad is unmapped or the cache is isolated;
• selects cache_control::FLUSH, sets SR.IsC alone, and zeroes the tag of every line;
• clears SR.IsC before writing cache_control::RUNNING back, since whether a store to FFFE0130h reaches the port while the cache is isolated isn’t documented;
• puts the caller’s SR back and returns.

Functions

flush_i_cacheDeprecated

Renamed to flush_instruction_cache.

flush_instruction_cache

Invalidate every line of the instruction cache.