Expand description
Root counter (timer) MMIO. Three 16-bit counters, each with counter /
mode / target registers. Mode bits select the clock source and IRQ
behaviour. Register addresses and the mode bits live in
[psx_hw::timers].
Enums§
- Timer
- One of the three root counters.
Functions§
- counter
- Current counter value (0..=65535).
- mode
- Read the mode register (includes the sticky “reached target” and
“reached wrap” bits, [
psx_hw::timers::mode::REACHED_TARGET] and [psx_hw::timers::mode::REACHED_WRAP]). - set_
counter - Set the counter directly.
- set_
mode - Mode / control register; the bits are [
psx_hw::timers::mode]. Writing it reconfigures the counter and resets it to 0. - set_
target - Target value for
reset-on-targetmode.