Module irq 

Interrupt controller: pending and enabled sources.

The register addresses and source bit positions live in [psx_hw::irq].

Modules

source

Moved to [psx_hw::irq::source].

Functions

ackDeprecated

Renamed to acknowledge.

acknowledge

Acknowledge pending bits by writing !(bits) – the hardware AND-accumulates, so any bit left 1 in the written value is preserved, any bit that was 0 is cleared.

disable_cpu_interrupts^⚠

Clear the CPU’s interrupt-enable bit (COP0 SR.IEc) and report whether it was set, so restore_cpu_interrupts can put it back. Sections nest.

mask

Enabled interrupt sources (the mask register).

pending

Pending interrupt sources, one bit per [psx_hw::irq::source] position.

restore_cpu_interrupts^⚠

Put back the interrupt-enable bit disable_cpu_interrupts found.

set_mask

Set the mask register (who can interrupt the CPU).

without_interrupts

Run f with CPU interrupts masked, then restore the previous state.