Module regs 

GTE register accessors.

These are macros, not functions, because the GTE register index is encoded as a 5-bit immediate field in the instruction – you can’t pass it as a runtime value without either stamping 32 separate functions or generating code at build time. Macros keep the call site readable (write_data!(0, value)) while letting the assembler emit the exact encoding.

Every macro emits a hand-built .word rather than the mnemonic (mtc2, mfc2, ctc2, cfc2). The mipsel-sony-psx LLVM target gates the coprocessor-2 instruction class behind a CPU feature that isn’t enabled, so passing the mnemonic through the assembler fails with “instruction requires a CPU feature not currently enabled”. Emitting the raw 32-bit encoding sidesteps that gate; the hardware still decodes it the same way.

Encoding (per PSX-SPX, “MIPS Coprocessor 2 Opcodes”):

  bits 31..26 = 0x12 (COP2)
  bits 25..21 = rs           -- 0=MFC2, 2=CFC2, 4=MTC2, 6=CTC2
  bits 20..16 = rt           -- CPU general-purpose register
  bits 15..11 = rd           -- COP2 data/control register index
  bits 10..0  = 0

We pin the CPU-side register to $t0 ($8) via in("$8") / out("$8") operands, so the encoding becomes opcode_base | 8<<16 | rd<<11. The compiler is responsible for shuttling values into/out of $t0, which keeps call sites unobstructed.

Register index tables (mirroring emulator-core::gte):

Data regs	Purpose
0..=5	V0, V1, V2 input vectors (packed XY / Z)
6	RGBC
7	OTZ (output average Z)
8	IR0 (scalar accumulator)
9..=11	IR1, IR2, IR3 (vector accumulators)
12..=15	SXY FIFO (12..=14 slots, 15 = SXYP push)
16..=19	SZ FIFO (16=SZ0 oldest … 19=SZ3 newest)
20..=22	RGB FIFO
24	MAC0
25..=27	MAC1, MAC2, MAC3
28 / 29	IRGB (write) / ORGB (read) 5:5:5 view
30 / 31	LZCS / LZCR

Control regs	Purpose
0..=4	RT rotation matrix
5..=7	TR translation
8..=12	LLM light-direction matrix
13..=15	BK background colour (light bias)
16..=20	LCM light-colour matrix
21..=23	FC far colour
24 / 25	OFX / OFY screen offsets
26	H projection plane
27 / 28	DQA / DQB depth-cue coefficients
29 / 30	ZSF3 / ZSF4 AVSZ weights
31	FLAG (error/saturation bits)

Functions

pack_xy

Helper: pack two i16 values into one u32 for MTC2/CTC2 of XY-pair registers (V0 X/Y, SXY slots, rotation matrix rows, …).

unpack_xy

Inverse of pack_xy – split a packed word back into two i16s.